Last Updated on 2021-10-21 by Clay
The article introduce what is the Register and Random Access Memory (RAM).
- The Arithmetic Logic Unit (ALU) has been recorded before (you can refer "Read More"). However, if the result of the calculation is not stored, it is meaningless: we need the memory of the computer to store something.
- Use you computer to play a RPG game or write a program, if you suddenly unplug the power, it means that you have lost your progress: This is because of your computer use RAM (Random Access Memory) to store all the information of the current work.
- The other types of memory such as persistent memory, do not rely on power.
How to "remember" information (Register)
- As everyone knows, the information in the computer is composed of 0 and 1
- To store information (bit), you need to use AND-OR LATCH.
The case of 1
To use OR Gate and adding the return path (feedback) can make the circuit memorize the situation of 1.
The truth table of OR is as follows:
INPUT A | INPUT B | OUTPUT |
---|---|---|
0 | 0 | 0 |
0 | 1 | 1 |
1 | 0 | 1 |
1 | 1 | 1 |
As you can see, if there is 1 in the input, the output is 1 anyway. With this feature, we design a feedback path, which can keep this circuit at 1, that is, remember the situation of 1.
After that, even if we change the input, we cannot change the output result. This is the case of memory 1.
The case of 0
In contrast, if you want to store 0, you must use AND Gate.
The truth table of AND is as follows:
INPUT A | INPUT B | OUTPUT |
---|---|---|
0 | 0 | 0 |
0 | 1 | 0 |
1 | 0 | 0 |
1 | 1 | 1 |
It can be found that only when INPUT A and B are both 1, the output is 1.
Using this feature, we set the feedback path to INPUT B to keep it at 0.
We will find that no matter how to modify INPUT A, the output result remains at 0. This is the case of memory 0.
AND-OR LATCH
Using the characteristics of the above two gates, we can design an AND-OR-LACH to store 0 or 1. There are only two types of latch input: SET and RESET.
Case of storage 1
If you set the SET input to 1, you will see that the final output of the entire latch is 1.
At this time, set both SET and RESET to 0 (it's a important step), and you will see that the latch also output 1.
The case of storage 0
If RESET is set to 1, the latch will output 0 anyway.
Set both SET and RESET to 0, the output of the latch is always 0.
Conclusion
Regardless of the final output of the latch, as long as SET and RESET are to 0 at the same time, the latch will store the final output state, which is the so-called memory. This is the way to store bits.
In fact, there is the so-called GATED LATCH, but I have drawn enough pictures today... (The tracepad of MacBook is very difficult to draw pictures).
So the detailed circuit structure allows me to skip, sorry.
Simply put, GATED LATCH is an advanced version of AND-OR-LATCH, and it is also a complicated circuit structure. IT as two inputs: data-in and write-enable.
The input data can be 0 or 1, but if the write permission is 0, the data cannot be written; on the contrary, if the write permission is 1, the input data will be stored as data out regardless or whether it is 0 or 1.
And a group of operating latches is called a register, which is our topic today.
Early computers started with 8-bit (the number of bits in the register), and today it is a large number of 64-bit. The meaning of bit is determined by the number of bits stored in the register.
Random Access Memory (RAM)
Random Access Memory (RAM) is the hardware in computer equipment used to store the currently used operating system (OS), applications, and data. The biggest use is to allow processors to quickly obtain these data.
RAM is the main memory in a computer. Compared with HDD and SSD, the read and write speeds are much faster.
When we turn of the computer, the OS, startup programs and documents will be written into the RAM by the HDD or SSD. And once the computer is turned off, the data in the RAM will disappear.
The above is the introduction about Register and Random Access Memory (RAM).
References
- https://www.youtube.com/watch?v=fpnE6UAfbtU
- https://terms.naer.edu.tw/detail/1314788/
- https://searchstorage.techtarget.com/definition/RAM-random-access-memory